Cadence announced that Nokia is deploying the AuraStack AI Super Agent on the Millennium M2000 AI Supercomputer, with Nokia reporting a 5X speedup in key design and analysis workflows and design cycles compressed from months to days. Futurum’s view is that this first named production deployment defines Cadence’s answer to Synopsys Autopilot. Cadence packages the agents, the engines, and the accelerated computing as one on-premises system that IP-sensitive customers can buy whole.
What is Covered in this Article
- Nokia’s production deployment of the Cadence AuraStack AI Super Agent on the Millennium M2000 AI Supercomputer, with a Nokia-reported 5x speedup in key design and analysis workflows
- A three-layer on-premises platform combining NVIDIA Nemotron-built agents, CUDA-X-accelerated Cadence solvers, and Blackwell-powered Millennium systems
- GPU-accelerated applications on the platform spanning Celsius, Clarity 3D, Quantus FS, EMX, Spectre X, and Voltus
- The NVIDIA relationship on both sides of the deal, from the $1 billion Nokia investment to the Nemotron models inside AuraStack
- Futurum’s view on agentic EDA monetization after Cadence’s 37% System Design and Analysis growth and record $8.1 billion backlog
The News: Cadence (Nasdaq: CDNS) announced on October 21 that Nokia is deploying the Cadence AuraStack AI Super Agent on the Cadence Millennium M2000 AI Supercomputer to accelerate electronic system design.
The platform combines three layers in a single on-premises system. The AuraStack agent, built with NVIDIA Nemotron open models, automates and coordinates tasks such as schematic capture, placement, routing, and multi-objective optimization. Beneath it, Cadence EDA and system design and analysis engines accelerated with GPU-optimized NVIDIA CUDA-X libraries, including cuDSS, and NVIDIA Omniverse run power integrity, thermal, electromagnetic, and circuit simulation. Millennium M2000 systems powered by NVIDIA Blackwell GPUs supply a modular compute foundation that scales with demand and runs multiple agentic workloads in parallel.
Nokia reports that the platform accelerates key design and analysis workflows by 5x, compressing design and analysis cycles from months to days while keeping sensitive engineering data and IP inside Nokia’s own environment. GPU-accelerated Cadence applications available on the platform include the Celsius Thermal Solver, Clarity 3D Solver, Quantus FS and EMX parasitic extractors, the Spectre X circuit simulator, and the Voltus IC Power Integrity Solution.
“Cadence uniquely brings together AI, computational software and accelerated computing in one platform,” said Michael Jackson, Corporate Vice President of R&D for System Design and Analysis at Cadence. Derek Urbaniak, Head of SoC Development at Nokia, said the platform is helping Nokia rethink how it approaches electronic system design and heterogeneous integration, closing multiphysics loops in a fraction of the time.
The full announcement is available in the Cadence press release.
Nokia Designs Network Hardware 5x Faster on Cadence’s Agentic Supercomputer
Analyst Take: Nokia is the first named production customer for the complete Cadence agentic stack, and the bundling tells a bigger story than the 5x. Cadence provided Nokia with an agent, the accelerated engines beneath it, and the supercomputer beneath those as one system that sits inside Nokia’s walls. Synopsys Autopilot, launched three weeks earlier with seven AgentEngineer domains and general availability planned for the end of 2026, is a software platform that runs on whatever compute the customer supplies. Cadence chose the opposite packaging: vertical integration down to the Blackwell GPUs with IP custody as the selling point. The 5x figure is Nokia’s own report from a production environment, which gives it more evidentiary weight than the launch benchmarks of either vendor. The contest between the two EDA leaders now has a deployment on the board, and it belongs to Cadence.
The On-Premises System Converts IP Protection Into a Hardware Attach
The release puts Nokia’s data custody at the center of the design. The full agentic loop, from Nemotron-based reasoning through GPU simulation, runs inside Nokia’s environment. That requirement is structural for a telecom equipment vendor whose SoC designs embed radio IP with national-security visibility across multiple jurisdictions, and it generalizes to defense, automotive, and hyperscaler silicon teams with the same constraint. Cadence has converted that constraint into a hardware transaction. An Autopilot-style software platform leaves the customer to assemble sanctioned compute; the Millennium M2000 delivers the sanctioned compute, modular enough to add capacity as agentic workloads multiply. Futurum covered the monetization logic in Cadence’s Q2 FY 2026 earnings, where agents drive more calls to volume-priced engines, System Design and Analysis revenue grew 37% in the quarter, and backlog reached a record $8.1 billion, up 27%. A supercomputer sale stacks a capital transaction on top of that consumption flywheel, and every agentic workload Nokia parallelizes on the M2000 raises the duty cycle of engines Cadence prices by volume. Management told investors in July that guidance assumes no sudden step-up in agentic monetization. Nokia is what the step-up looks like.
The Deployment Completes an NVIDIA Triangle Around Nokia’s Silicon Ambitions
NVIDIA announced a $1 billion investment in Nokia in October 2025, at $6.01 per share, anchoring a partnership that puts the NVIDIA Aerial RAN Computer Pro inside Nokia’s AirScale baseband portfolio and points both companies at AI-native 6G networks, with T-Mobile field trials beginning in 2026. This deployment adds the design-side leg. Nokia’s SoC development organization now runs its engineering workflows on NVIDIA Blackwell compute, through agents built on NVIDIA Nemotron models, orchestrating Cadence engines accelerated with NVIDIA CUDA-X. Urbaniak’s framing around heterogeneous integration signals where these points are. The RAN compute Nokia will ship in the 6G era, mixing its own silicon with NVIDIA accelerators in dense, thermally constrained packages, and the multiphysics loop the release describes, spanning power integrity, thermal, electromagnetic characterization, and circuit simulation, is the design problem that mix creates. The implication is that NVIDIA now touches Nokia’s economics from three directions, through the equity investment, the accelerators inside the end product, and the compute bill for the design process itself. Tim Costa, Vice President and General Manager of Industrial and Computational Engineering at NVIDIA, supplied endorsements for both this deployment and the Synopsys Autopilot launch, which measures how evenly NVIDIA seeds both sides of the EDA duopoly.
A Customer-Reported 5x Beats a Vendor-Benchmarked 80x
The number discipline here favors Cadence. At the March 2026 launch of the accelerated portfolio, Cadence claimed up to 80x greater throughput and up to 20x lower power for its GPU-resident solvers, with the Clarity 3D Solver rated up to 5x faster than an equivalent CPU-based system on an eight-GPU M2000 configuration. Those were vendor benchmarks on selected workloads. In contrast, Nokia reports the 5x on its own key design and analysis workflows in a production deployment, and the months-to-days cycle compression is Nokia’s characterization of its own experience.
The claim still needs boundaries. “Key workflows” is Nokia’s selection; the baseline is unstated, and a 5x on analysis-bound tasks says little about the end-to-end schedule, where verification queues and engineering review still set the pace. Futurum has applied the same standard across the category. Synopsys reports up to 50x faster verification closure and 2x token efficiency from pre-GA engagements. Cadence reported a FORVIA HELLA placement task cut from four days to four minutes at the AuraStack launch. Production validation by named customers is the currency that moves procurement, and Cadence moved the industry conversation forward.
Cadence and Synopsys Now Run Mirrored Architectures With Opposite Go-to-Market Models
Both vendors have converged on the same three-tier architecture of super agents orchestrating task agents over trusted ground-truth engines, and both build the reasoning layer on NVIDIA Nemotron open models. The divergence is commercial. Synopsys delivers breadth, with seven AgentEngineer domains spanning verification through manufacturing and the Ansys physics portfolio, positioned as the furthest advance toward full-lifecycle agents, on a platform that abstracts the customer’s choice of compute and LLM. Cadence brings depth plus iron, with AuraStack concentrated on system design, analysis, and advanced packaging, the least automated slice of EDA, delivered on Cadence-branded supercomputers. Siemens remains the incumbent to displace in board-level design with Xpedition while trailing with its holistic agentic roadmap.
Each model has a weakness that the other exploits. Autopilot’s openness invites sophisticated customers to adopt the APIs and keep orchestration in-house, a risk Futurum flagged at the Autopilot launch. The M2000 model concentrates capital cost and refresh risk at Cadence’s customers, and a telecom equipment vendor amortizing a supercomputer has made a multi-year commitment to one vendor’s stack before the agentic category has settled its standards. Nokia evidently judged the IP custody and the integration worth the lock-in. The question that decides the category is how many design organizations with Nokia’s constraints exist. Futurum’s read of the SD&A growth rate says the population is larger than the skeptics assume.
What to Watch
- Whether Cadence names additional AuraStack production customers beyond Nokia within two quarters
- Whether Nokia publishes workflow-level methodology behind the 5x figure or extends it to silicon design flows
- Whether Cadence quantifies Millennium hardware and agentic consumption revenue on the Q3 FY2026 earnings call
- Whether Synopsys answers with a named production Autopilot deployment before its end-of-2026 general availability
- Whether the Nokia deployment expands from electronic system design into RAN SoC implementation and signoff
Sources
Declaration of generative AI and AI-assisted technologies in the writing process: This content has been generated with the support of artificial intelligence technologies. Due to the fast pace of content creation and the continuous evolution of data and information, The Futurum Group and its analysts strive to ensure the accuracy and factual integrity of the information presented. However, the opinions and interpretations expressed in this content reflect those of the individual author/analyst. The Futurum Group makes no guarantees regarding the completeness, accuracy, or reliability of any information contained herein. Readers are encouraged to verify facts independently and consult relevant sources for further clarification.
Disclosure: Futurum is a research and advisory firm that engages or has engaged in research, analysis, and advisory services with many technology companies, including those mentioned in this article. The author does not hold any equity positions with any company mentioned in this article.
Analysis and opinions expressed herein are specific to the analyst individually and data and other information that might have been provided for validation, not those of Futurum as a whole.
Read the full Futurum Group Disclosure.
Other Insights from Futurum:
TSMC’s OIP Forum Turns Agentic Chip Design Demos Into Production Flows
Cadence ChipStack Adds RTL Generation: Can Agents Code Production…
ADI SHARC-FX Runs on Cadence IP: Is the Proprietary DSP Era Over?
Author Information
Brendan is Research Director, Semiconductors, Supply Chain, and Emerging Tech. He advises clients on strategic initiatives and leads the Futurum Semiconductors Practice. He is an experienced tech industry analyst who has guided tech leaders in identifying market opportunities spanning edge processors, generative AI applications, and hyperscale data centers.
Before joining Futurum, Brendan consulted with global AI leaders and served as a Senior Analyst in Emerging Technology Research at PitchBook. At PitchBook, he developed market intelligence tools for AI, highlighted by one of the industry’s most comprehensive AI semiconductor market landscapes encompassing both public and private companies. He has advised Fortune 100 tech giants, growth-stage innovators, global investors, and leading market research firms. Before PitchBook, he led research teams in tech investment banking and market research.
Brendan is based in Seattle, Washington. He has a Bachelor of Arts Degree from Amherst College.
