Cerebras unveiled the CS-4 at its Supernova 2026 event, packing three WSE-3 Turbo wafers into a redesigned Nexus rack with doubled per-wafer power delivery, direct liquid cooling, and a new Ethernet-based scaling fabric. Futurum views the substance of this launch in the power delivery, cooling, and networking that now determine whether wafer-scale can serve trillion-parameter models in production.
What is Covered in this Article
- The Cerebras CS-4 launch at Supernova 2026, with three WSE-3 Turbo wafers per rack shipping this quarter
- The Nexus rack architecture and its doubled per-wafer power delivery and direct liquid cooling
- The new Wafer I/O Module and Arista Networks Etherlink switches for scaling within and across racks
- Disaggregated inference pairings with AMD Helios and AWS Trainium
- The Q2 2026 financial backdrop: a $25.4 billion backlog, a 10x manufacturing ramp, and 600 MW of data center capacity
The News: Cerebras Systems (NASDAQ: CBRS) unveiled the CS-4, its fourth-generation wafer-scale system and its first to integrate three wafers in a single rack, at its Supernova 2026 event on August 18. Built on three new WSE-3 Turbo processors, each with 900,000 AI-optimized cores, 44 GB of on-wafer SRAM, and 43.2 PB/s of memory bandwidth, the CS-4 delivers 750 PFLOPs of AI compute, 7.2 Tb/s of system I/O, and wafer-to-wafer latency as low as 2 microseconds. Cerebras claims up to 2x faster performance and up to 10x more token capacity than CS-3, inference up to 30x faster than GPU-based systems, and more than 1,000 tokens per second on models exceeding 10 trillion parameters. The system’s Nexus platform architecture supports disaggregated inference with AMD Helios and AWS Trainium handling prefill. “In AI, speed is productivity,” said Andrew Feldman, Co-Founder and CEO of Cerebras Systems. First CS-4 shipments begin this quarter. The full announcement is available on the Cerebras investor relations website.
Cerebras CS-4 Makes the Rack the New Chip by Doubling Power and Tripling Wafers
Analyst Take: The Cerebras CS-4 is a systems announcement taking the place of a chip launch. The WSE-3 Turbo inside is a tuned version of the silicon Cerebras introduced in 2024, with the same 44 GB of on-wafer SRAM, so the claimed gains come from the rack with doubled power delivery per wafer, direct liquid cooling folded into a rear-mounted Wafer-Scale Backpack, and a networking overhaul spanning a new Wafer I/O Module and Arista Networks Etherlink switches. Seeing the system up close at Supernova confirmed where the engineering went. Liquid cooling valves shared the spotlight with the wafer itself, a sensible allocation of stage time when double the power per chip is the primary performance unlock. Rack designs are becoming as heterogeneous as the silicon inside them, and Cerebras, running the most extreme chip in production, now fields the most distinctive rack in the industry.
The timing raises the stakes beyond a routine generational refresh. One week before Supernova, Cerebras reported Q2 core revenue of $209.9 million, up 103% YoY, alongside a hardware revenue decline. The company has promised investors a manufacturing capacity expansion of more than 10x in 2026 and has more than 600 MW of data center capacity live or under contract for delivery by the end of 2027. Futurum wrote in its Cerebras S-1 teardown that backlogs are not revenue. The CS-4 is the physical asset that can convert them, and this quarter’s shipments will show whether wafer scale can serve trillion parameter models at the scale those commitments assume.
Doubled Power Delivery Does the Work a New Chip Usually Would
The central engineering claim of the CS-4 is that power density substitutes for a process shrink. Cerebras moved power conversion from roughly 50 millimeters to 0.5 millimeters from the processor, a change the company says nearly eliminates board-level power loss and allows twice as much power into each WSE-3 Turbo. The same transistors run faster because the rack feeds and cools them better. The Wafer-Scale Backpack packages that power stage with direct liquid cooling, high-speed I/O, and control electronics in a self-contained assembly with 50% fewer components than the prior generation and 60% more automated manufacturing, cutting deployment from days to hours by Cerebras’ account. Reported rack power of 120 kW to 140 kW lands at roughly half the ~240 kW to 250 kW expected of AMD Helios and NVIDIA Vera Rubin class racks, even with three wafers aboard.
The bear case is that doubled power density is a manufacturing and reliability bet that has to pay off in the field. Pushing twice the wattage into the same transistors concentrates thermal stress on exactly the component that cannot be swapped when it fails, and the CS-4 will ramp through three contract manufacturers newly scaling to 10x volume. Futurum has consistently flagged that vendor performance claims need production validation before they reshape procurement, and this launch supplies several: the up to 30x figure compares against GPU configurations Cerebras selected, and the up to 10x token capacity and 2x speed claims. The 4,400 tokens per second per user on GPT-OSS-120B is attributed to Artificial Analysis alongside internal benchmarks, and neither disclosure specifies the configuration behind it: wafer count, batch size, context length, and concurrency all go unstated. A per-user speed record measured at low concurrency on a 120 billion parameter model says little about the trillion parameter serving economics this rack was built to prove. On-wafer memory also stays at 44 GB per wafer, so trillion-parameter models must span many wafers and racks, which shifts the burden of this generation onto the interconnect.
Networking Decides Whether Disaggregated Inference Becomes Reliable
Futurum has argued that networking is the bottleneck standing between disaggregated inference and production reliability, and the CS-4’s design agenda reads as agreement. The new Wafer I/O Module, a programmable, field-upgradeable subsystem, doubles off-wafer bandwidth to 2.4 Tb/s per wafer and 7.2 Tb/s per system, speaks standard RoCE v2 RDMA over Ethernet, and adds Direct Wafer Links that join wafers within and across racks at 2 microseconds without touching a switch. For larger clusters, Cerebras showed the system fabric built on Arista Networks Etherlink switches at Supernova, with reduced latency between racks. That combination is what scales one chip to three within a rack and racks into coherent clusters, and it is what lets a Cerebras decode tier accept prefill traffic from AMD Helios or AWS Trainium over standard Ethernet. Mark Papermaster, Executive Vice President and CTO of AMD, said the combined architecture pairs GPU strengths in parallel computation with Cerebras’ low-latency decode capabilities.
The implication is that Cerebras has traded proprietary isolation for membership in an Ethernet ecosystem, and the trade cuts both ways. Standard RoCE v2 makes the CS-4 composable with third-party hardware. The vendors claim the combined stack runs 10x faster than GPU-only systems with 5x the throughput of Cerebras alone, figures that have gone onstage at AMD”s Advancing AI event yet remain pending production deployments. The open question is operational ownership. A disaggregated cluster spanning Cerebras decode, AMD or AWS prefill, and an Arista fabric has no single vendor accountable when tail latency spikes at 3 a.m., and enterprises writing SLAs against agentic workloads will want one throat to choke. Reliability engineering across that seam, more than any single latency number, determines whether disaggregated inference graduates from benchmark demos to production infrastructure.
The Cerebras CS-4 Ramp Decides Whether a $25.4 Billion Backlog Becomes Revenue
The Q2 print explains why the CS-4 arrived as a manufacturing story as much as a performance story. Cloud and other services revenue grew 281% YoY to $126.0 million as the fast inference business nearly quadrupled, while hardware revenue of $54.1 million came in at roughly half its Q1 level. Futurum flagged at the IPO that Cerebras is becoming a cloud operator that builds its own hardware, with the capital intensity that model demands. Remaining performance obligations reached $25.4 billion, CFO Bob Komin said the company plans to more than triple revenue in 2027, and manufacturing capacity is contracted to expand more than 10x across Flex, Sanmina, and Rocket EMS this year. Every one of those commitments assumes the CS-4 ramps on schedule. The Backpack’s 50% component reduction and automated assembly are as material to the investment case as the 2x speedup, and the OpenAI engagement serving GPT-5.6 Sol Ultrafast at 750 tokens per second is the marquee workload the new racks must sustain.
The CS-4 Reassures Cerebras’ Partners and Widens Its Market Beyond Speed
Every major vendor now concedes the premise that a single homogeneous accelerator no longer serves both phases of inference well, and Cerebras’ partners committed to that premise before the hardware existed to honor it at scale. AWS and AMD signed disaggregated inference pairings, and OpenAI made Cerebras a launch partner for GPT-5.6 Sol at 750 tokens per second, all against an installed base the CS-3 could not stretch to cover. The CS-4 is the production system that partners needed to see before scaling their commitments. AMD still plays both sides of the story, supplying Helios as the prefill partner while selling Instinct against the CS-4 and integrating its Taalas acquisition, which hardwires model weights into silicon for the high-volume decode path. Vera Rubin systems with Groq optionality are expected to arrive in late 2026 at roughly twice the CS-4’s rack power, per current disclosures.
The throughput claims widen the addressable market beyond the speed niche. What is real in Cerebras’ position is per-user speed: no shipping system approaches 4,400 tokens per second per user on a production model, and Futurum has argued that inference speed is graduating into a distinct market category with its own buyers. The up to 10x token capacity claim points at a second market: high-volume workloads where the incumbent alternative is a CPU fleet, such as reinforcement learning rollouts that generate billions of tokens of model experience per training run and consumer software backends that default to CPUs on cost grounds. The implication is that Cerebras can sell the same rack twice, as a latency product to agentic AI buyers and as a throughput product to labs and consumer platforms. The incumbent counter-move is already visible; NVIDIA and AMD can bundle prefill, decode, and networking from one order book, while Cerebras must orchestrate Arista, AMD, and AWS to deliver the same completeness.
What to Watch
- Whether CS-4 systems ship to customers this quarter and the launch claims survive independent benchmarks with disclosed configurations on trillion parameter models
- Whether hardware revenue recovers from $54.1 million at the Q3 earnings report in November as the 10x manufacturing ramp converts the $25.4 billion backlog
- Whether a production cluster pairing CS-4 decode with AMD Helios or AWS Trainium prefill validates the 5x combined throughput claim outside vendor labs
- Whether NVIDIA’s Groq productization and AMD’s Taalas roadmap turn decode-specialized hardware into a standard rack ingredient by 2027
Sources
1. Introducing Cerebras CS-4: The Fastest AI Just Got Faster, Cerebras, August 2026
Declaration of generative AI and AI-assisted technologies in the writing process: This content has been generated with the support of artificial intelligence technologies. Due to the fast pace of content creation and the continuous evolution of data and information, The Futurum Group and its analysts strive to ensure the accuracy and factual integrity of the information presented. However, the opinions and interpretations expressed in this content reflect those of the individual author/analyst. The Futurum Group makes no guarantees regarding the completeness, accuracy, or reliability of any information contained herein. Readers are encouraged to verify facts independently and consult relevant sources for further clarification.
Disclosure: Futurum is a research and advisory firm that engages or has engaged in research, analysis, and advisory services with many technology companies, including those mentioned in this article. The author does not hold any equity positions with any company mentioned in this article.
Analysis and opinions expressed herein are specific to the analyst individually and data and other information that might have been provided for validation, not those of Futurum as a whole.
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Author Information
Brendan is Research Director, Semiconductors, Supply Chain, and Emerging Tech. He advises clients on strategic initiatives and leads the Futurum Semiconductors Practice. He is an experienced tech industry analyst who has guided tech leaders in identifying market opportunities spanning edge processors, generative AI applications, and hyperscale data centers.
Before joining Futurum, Brendan consulted with global AI leaders and served as a Senior Analyst in Emerging Technology Research at PitchBook. At PitchBook, he developed market intelligence tools for AI, highlighted by one of the industry’s most comprehensive AI semiconductor market landscapes encompassing both public and private companies. He has advised Fortune 100 tech giants, growth-stage innovators, global investors, and leading market research firms. Before PitchBook, he led research teams in tech investment banking and market research.
Brendan is based in Seattle, Washington. He has a Bachelor of Arts Degree from Amherst College.
