Analyst(s): Brendan Burke
Publication Date: August 28, 2026
SiFive introduced the BigSky SF-2U870 at Hot Chips, the first enterprise-grade rackable 2U RISC-V server, with RVA23 compliance, out-of-the-box Ubuntu 26.04 LTS and RHEL 10 support, and CUDA running on its P870-D cores as a head node for LLM workloads on NVIDIA GPUs. Futurum reads BigSky as a porting vehicle whose real product is time, built to compress the software phase of hyperscaler custom SoC programs.
What Is Covered in This Article:
- The BigSky SF-2U870 Launch at Hot Chips on August 24, 2026, the first enterprise-grade rackable 2U RISC-V server
- RVA23 compliance with out-of-the-box Ubuntu 26.04 LTS and Red Hat RHEL 10 support
- CUDA running on the P870-D-powered platform as a head node for LLM workloads on NVIDIA GPUs, with NVLink Fusion integration planned for future SiFive platforms
- Lead customers already running workloads, spanning hyperscaler, software, and major SoC hardware leaders
- The readiness context from the Hot Chips RISC-V tutorial, where NVIDIA reported three RVA23 CPUs in its labs versus zero a year ago
The News: SiFive introduced the BigSky SF-2U870 datacenter development platform on August 24 at an event coinciding with Hot Chips in Santa Clara, describing it as the world’s first enterprise-grade, rackable 2U RISC-V server. Built in collaboration with hyperscaler customers and ecosystem partners, the platform targets RISC-V datacenter software porting, workload optimization, and system validation, and SiFive is demonstrating it running a variety of server workloads at the event. The system is fully compliant with the RVA23 profile and supports standard enterprise Linux releases out of the box, including Canonical Ubuntu 26.04 LTS and Red Hat RHEL 10. SiFive states that lead customers, including hyperscalers, software, and major SoC hardware leaders, are currently running workloads on deployed BigSky systems.
SiFive BigSky Ships the First RISC-V Server. Is the GPU Head Node the Prize?
Analyst Take: The first RISC-V server arrives as a development platform, and its significance is best measured against the path Arm took into the data center. Arm needed a decade of Neoverse iterations, Graviton proof points, and enterprise Linux parity before Axion and Cobalt could displace x86 sockets at fleet scale. RISC-V server CPUs now sit where Arm sat around 2018: the RVA23 profile and server platform spec are ratified, Ubuntu 26.04 LTS and RHEL 10 boot out of the box, and the first silicon capable of running that stack is reaching customers. What has gated the architecture since RVA23 ratification is software rather than silicon, and BigSky exists to close that gap on schedule.
SiFive licenses processor IP for a living, so the SF-2U870 may never book meaningful hardware revenue. What the box sells is time: every hyperscaler custom SoC program built on SiFive IP faces a multi-year software phase covering OS bring-up, toolchain qualification, workload porting, and performance tuning, and BigSky moves that work to hardware a customer can rack today, years before the custom SoC it licenses those cores into tapes out.
The destination differs from Arm’s in one structural way. Arm substitution won sockets on power efficiency inside a licensing model that still controls the ISA. RISC-V offers the same efficiency argument plus an open standard that a hyperscaler can extend without permission, which is why the customizable head node, demonstrated here running CUDA against NVIDIA GPUs, is the socket that reprices SiFive’s position.
The First RISC-V Server Meets a Waiting Software Stack
The timing of BigSky reflects a chicken-and-egg problem that the RVA23 profile solved in software’s favor. At the Hot Chips tutorial on August 23, Krste Asanović, Chief Architect of RISC-V International and SiFive, said 2026 is the year RVA23 server-class silicon appears from multiple vendors, able to boot standard Linux distros interchangeably, with the RISC-V server platform spec covering UEFI, ACPI, and IOMMU requirements already ratified. Canonical committed before any of that hardware existed. Gordan Markuš, Director of Silicon Alliances at Canonical, described a full rebuild of roughly 30,000 packages on RVA23 for Ubuntu 25.10, promoted to the 26.04 long-term supported release in April 2026, with Debian package availability for RISC-V at roughly 95% of the most-deployed architectures. Red Hat’s RHEL 10 support on BigSky extends the same commitment to the second enterprise distro that matters, and Brian Harrington, Strategist in Red Hat’s CTO Organization, framed the port as movement from the theoretical phase into production-grade reality. Vendor enthusiasm aside, the out-of-the-box claim has an honest asterisk from Canonical’s own tutorial disclosure: emulation timeouts currently limit full-archive testing to roughly 3,000 packages, and native RISC-V build infrastructure is still under construction. Availability is proven at 95%. Correctness at parity is a 2026 deliverable that BigSky-class hardware itself will help close, since native builders need native servers.
CUDA on the P870-D Claims the Head Node Seat NVIDIA Just Opened
The CUDA demonstration converts a January partnership announcement into running code. Futurum covered the SiFive and NVIDIA collaboration when NVLink Fusion opened the custom CPU slot in NVIDIA’s rack architecture, and the tutorial supplied the measure of progress: Frans Sijstermans reported that a year ago no RVA23 CPU existed to port CUDA onto, that at least three now sit in NVIDIA’s labs, and that the requirements beyond the RVA23 profile and server platform specs total roughly two pages, principally PCIe coherency and peer-to-peer support. The BigSky demo makes one of the three public.
A P870-D head node feeding LLM workloads to NVIDIA GPUs is a deliberately modest first socket, and its economics are anything but. Futurum has argued that agentic workloads restore the CPU to the center of AI infrastructure, and the head node is where orchestration, tool calls, and KV cache management live. NVIDIA builds Vera on a custom Arm core for exactly this duty. NVLink Fusion exists because some customers want that seat filled by silicon they control, and a hyperscaler that already licenses SiFive IP can now validate the CUDA path on merchant hardware before committing a custom design. The C2C integration requirement remains the toll: a production NVLink Fusion CPU must carry NVIDIA’s coherent interconnect, and SiFive’s integration work is described as planned for future platforms rather than shipping in this one.
A Development Server Proves Readiness While Production Sockets Stay Unclaimed
The challenge is the distance between a porting vehicle and a procurement decision. SiFive published no performance data with BigSky, no SPEC results, no power figures, and no pricing, so the platform proves software compatibility while leaving the competitive question open. The P870-D is a 6-wide out-of-order core announced in August 2024, scaling to 32 cores per cluster and 256 coherent cores over a CHI bridge, and it will meet production alternatives that have been shipping at fleet scale for years. Google has migrated 30% of internal applications to Arm-based Axion, Microsoft is scaling Cobalt 200, and AMD and Intel continue to hold the x86 volume that defines server price-performance.
The RISC-V field itself is crowded: Qualcomm’s Dragonfly roadmap pairs Oryon-based C1000 CPUs with the Ventana Micro RISC-V team it acquired in December, and Tenstorrent ships Ascalon-based systems into inference. Lead customers on BigSky are real and unnamed, which keeps the design-win ledger empty for now. SiFive’s business model shapes the risk in a specific way. An IP licensor building a server is spending margin to shorten its customers’ schedules, and the investment pays only if porting work on BigSky converts into licensed custom SoCs. The $400 million Series G that Futurum covered in April, with NVIDIA among the investors, funds that bet. The next 12 months of named hyperscaler tape-outs will show whether the time BigSky sells was the binding constraint.
What to Watch:
- Whether a hyperscaler names a custom SoC program built on SiFive datacenter IP within the next 12 months
- Whether Canonical’s native RISC-V builders close the package-testing gap to parity with other architectures by the 26.10 cycle
- Whether NVLink Fusion integration appears in a named SiFive platform with C2C, and on what timeline
- Whether Qualcomm’s Ventana roadmap or Tenstorrent’s Ascalon systems reach comparable enterprise Linux and CUDA milestones
- Whether additional RVA23 server silicon from the vendors Asanović referenced appears with public demonstrations this year
See the complete announcement of the BigSky development platform on the SiFive website.
Disclosure: Futurum is a research and advisory firm that engages or has engaged in research, analysis, and advisory services with many technology companies, including those mentioned in this article. The author does not hold any equity positions with any company mentioned in this article.
Analysis and opinions expressed herein are specific to the analyst individually and data and other information that might have been provided for validation, not those of Futurum as a whole.
Other Insights From Futurum:
Will SiFive’s $400 Million Round Unblock the Data Center CPU Bottleneck?
Tenstorrent’s Galaxy Blackhole: Can RISC-V Processors Expand Fast Inference Globally?
Author Information
Brendan is Research Director, Semiconductors, Supply Chain, and Emerging Tech. He advises clients on strategic initiatives and leads the Futurum Semiconductors Practice. He is an experienced tech industry analyst who has guided tech leaders in identifying market opportunities spanning edge processors, generative AI applications, and hyperscale data centers.
Before joining Futurum, Brendan consulted with global AI leaders and served as a Senior Analyst in Emerging Technology Research at PitchBook. At PitchBook, he developed market intelligence tools for AI, highlighted by one of the industry’s most comprehensive AI semiconductor market landscapes encompassing both public and private companies. He has advised Fortune 100 tech giants, growth-stage innovators, global investors, and leading market research firms. Before PitchBook, he led research teams in tech investment banking and market research.
Brendan is based in Seattle, Washington. He has a Bachelor of Arts Degree from Amherst College.
