Cadence has extended its agentic AI franchise past silicon and onto the system board, launching the AuraStack AI Super Agent for printed circuit board (PCB) and advanced packaging design. The move targets the multiphysics bottleneck that rack-scale AI platforms such as NVIDIA’s Rubin have created and answers the agentic multiphysics push Synopsys made at Computex, the one front where Cadence had fallen behind.
What Is Covered in This Article:
- Cadence introduced the AuraStack AI Super Agent on Allegro AI Studio, extending its silicon-to-system agent portfolio into PCB and advanced packaging.
- As rack-scale platforms push power, thermal, and interconnect density to physical limits, board and package design can no longer be signed off one domain at a time.
- AuraStack directly answers the agentic multiphysics capability Synopsys demonstrated at Computex 2026, closing what Futurum identified as Cadence’s structural gap.
- Cadence cites vendor-supplied gains of up to 2x faster time to market and 15x task productivity, with partner figures from NVIDIA (20x multiphysics performance on Millennium M2000), TSMC (100x substrate routing), and FORVIA HELLA (a 300 component placement task cut from four days to four minutes).
- A consumption-based pricing model, LLM-agnostic design, and a September 2026 rollout target.
The News: Cadence introduced the AuraStack AI Super Agent on Cadence Allegro AI Studio, extending its agentic AI portfolio into printed circuit board (PCB) and advanced packaging design. Accelerated by NVIDIA Blackwell and CUDA-X, the agent coordinates domain-specific tasks across planning, implementation, and multiphysics analysis, and extendes Cadence’s stated silicon-to-system agent flow from digital and analog silicon through advanced packaging to the board, building on its ChipStack, ViraStack, and InnoStack AI Super Agents. Cadence positions AuraStack as the first agentic AI platform for PCB and advanced packaging, reports vendor-measured gains of up to 2x faster time to market and 15x task productivity, and names NVIDIA, TSMC, Socionext, FORVIA HELLA, and Schneider Electric among early collaborators. The agent is scheduled to become available in 2026.
Michael Jackson, corporate vice president of R&D for System Design and Analysis at Cadence, framed the launch around the growing complexity of AI infrastructure, which he said will be defined not only by silicon but by “the systems that connect, power and cool it.”
Cadence AuraStack Extends Agentic Leadership Toward Advanced Packaging Design
Analyst Take: Cadence’s AI strategy is quickly becoming a leading example of agentic transformation while expanding off the chip and onto the system board. Using agentic architecture that Futurum views as state-of-the-art, ChipStack automates front-end silicon verification, ViraStack the custom and analog, and InnoStack the digital back-end. Addressing an orthogonal yet even more complex challenge, AuraStack takes the same super-agent architecture into PCB and advanced packaging, the layer that turns a die into a working system. This capability demonstrates rapid growth in agent capability and will become mission-critical as AI infrastructure scales toward rack-level platforms such as NVIDIA’s Vera Rubin and the 600-kilowatt Rubin Ultra generation. The hardest engineering problems are migrating out of the die and into the board, the package, and the power and thermal envelope around them. That is the territory AuraStack is built for and the one front where Cadence had been most exposed to Synopsys.
AI Racks Like Rubin Ultra Turn the Board Into a Multiphysics Problem
The system design bottleneck is now a physics problem rather than a layout problem. NVIDIA’s 2027 Rubin Ultra “Kyber” rack is specified near 600 kilowatts, with 576 GPU dies, an 800-volt DC power architecture, mandatory liquid cooling, and co-packaged optics that sit heat-sensitive lasers millimeters from switch ASICs dissipating 400 to 800 watts. Designing the boards, substrates, and packages for systems at that density forces electrical, thermal, and mechanical domains to interact continuously. Signal and power integrity, IR drop, thermal gradients, mechanical stress, and warpage can no longer be validated one at a time by separate teams using separate point tools.
This is the problem AuraStack targets, with a unified multiphysics loop that models electrical, thermal, and mechanical behavior concurrently so tradeoffs surface early rather than at end-of-cycle signoff, where a late failure forces an expensive respin. Advanced packaging has shifted from back-end cost center to a primary lever on performance-per-watt as node scaling slows. The board and package are the fastest-growing, least-automated slice of EDA and the slice most stressed by AI-era power and thermal density.
AuraStack Closes the Multiphysics Gap Synopsys Opened at Computex
AuraStack serves as Cadence’s answer to the one place its agentic story trailed. At Computex 2026, as Futurum documented, the agentic EDA race split into two bets: Cadence pushed depth, taking ChipStack to Level-5 verification autonomy with NVIDIA’s endorsement, while Synopsys pushed breadth, demonstrating an Ansys IcePak thermal agent that meshed, simulated, and optimized GPU cooling with NVIDIA’s NemoClaw. Synopsys had extended agentic automation into thermal and physical closure on the strength of the Ansys multiphysics engines it acquired and Cadence lacked an Ansys-equivalent stack to automate that closure. AuraStack moved to close by unifying Cadence’s own signoff engines — the Celsius thermal solver, the Clarity 3D electromagnetic solver, the Sigrity signal- and power-integrity tools, and the Nastran and Marc mechanical solvers from its Hexagon and MSC assets — into a single closed loop. Synopsys reached agentic thermal closure first and did it inside the die. Cadence is answering on the board and package side, where its franchise is strongest and where Siemens’ entrenched Xpedition and PADS remain the incumbent to displace. The contest is now closer to symmetric than lopsided, increasing the likelihood of end-to-end design automation.
Grounding Agentic Performance in Customer Efficiency Gains
The case for an agent here rests on the extent of the problem: in Cadence’s own account, a board or package design is not one hard task but thousands of small ones — adding a library component, optimizing a bill of materials, closing signal integrity — and the bottleneck is no longer automating any single one but orchestrating across all of them. That burden grows with complexity, and our briefing indicated that for the most complex designs, board and advanced-package work can now take longer than silicon design. Cadence reports 15x task-level productivity, with a customer placement-and-routing task falling from 20 days to 20 minutes and FORVIA HELLA’s 300-component placement cut from four days to four minutes. The aggregate design time speeds up by roughly 2x, turning a nine- to twelve-month cycle into something meaningfully faster rather than instant.
Design workflows remain assisted instead of autonomous, with a high volume of designer interactions remaining necessary, and a runtime ceiling Futurum flagged at Computex means GPU acceleration of simulation and signoff, not agent intelligence, will decide who delivers speed at scale. What turns the gains into revenue is consumption pricing metered to how hard the models work, atop the required Allegro licenses, with rollout targeted for September 2026. That model lets Cadence capture productivity rather than surrender it as seat licensing shrinks, a bet that the System Design and Analysis segment’s increased full-year guidance gives room to run.
What to Watch:
- Whether Synopsys extends its Ansys-backed multiphysics agents toward the board and package, and whether GPU-accelerated tool runtime becomes the gating variable both vendors race to solve.
- Look to the Q3 and Q4 2026 earnings calls for System Design and Analysis segment growth and any disclosure on agentic AI monetization.
- Whether AuraStack’s concurrent multiphysics loop converts into tangible share against the manual, point-tool status quo that still dominates 2.5D and 3D design.
See the full announcement introducing the AuraStack AI Super Agent for PCB and advanced packaging design on the Cadence newsroom.
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Other Insights From Futurum:
Cadence and Synopsys Accelerate Agentic EDA Race at Computex
Author Information
Brendan is Research Director, Semiconductors, Supply Chain, and Emerging Tech. He advises clients on strategic initiatives and leads the Futurum Semiconductors Practice. He is an experienced tech industry analyst who has guided tech leaders in identifying market opportunities spanning edge processors, generative AI applications, and hyperscale data centers.
Before joining Futurum, Brendan consulted with global AI leaders and served as a Senior Analyst in Emerging Technology Research at PitchBook. At PitchBook, he developed market intelligence tools for AI, highlighted by one of the industry’s most comprehensive AI semiconductor market landscapes encompassing both public and private companies. He has advised Fortune 100 tech giants, growth-stage innovators, global investors, and leading market research firms. Before PitchBook, he led research teams in tech investment banking and market research.
Brendan is based in Seattle, Washington. He has a Bachelor of Arts Degree from Amherst College.
