Lattice Semiconductor announced Lattice Sentry 5.0, which the company presents as the industry’s first post-quantum cryptography-enabled Platform Firmware Resilience and attestation solution, ahead of OCP Global Summit 2026. The release integrates AMI Tektagon PQC Resiliency with Lattice’s CNSA 2.0-compliant FPGA portfolio. Futurum reads Sentry 5.0 as the first product proof that the AMI acquisition converts Lattice from a control silicon vendor into a platform security stack vendor.
What Is Covered in This Article:
- Lattice Sentry 5.0 as a PQC-enabled Platform Firmware Resilience and attestation stack
- NIST SP 800-193 firmware protection, detection, and autonomous recovery with crypto agility and anti-rollback
- CNSA 2.0-compliant PQC algorithms alongside classical ECDSA and AES-GCM
- SPDM device attestation and DICE-anchored identity for disaggregated rack environments
- AMI Tektagon PQC Resiliency integration and the competitive field across Microchip, Caliptra, and BMC-based approaches
The News: Lattice Semiconductor (NASDAQ: LSCC) announced version 5.0 of the Lattice Sentry solution stack on October 12, presenting it as the industry’s first post-quantum cryptography (PQC)-enabled Platform Firmware Resilience (PFR) and attestation solution. Sentry 5.0 combines NIST SP 800-193-compliant protection, detection, and autonomous recovery for BIOS, BMC, and other board firmware with CNSA 2.0-compliant PQC, including ML-DSA, LMS, and XMSS for authentication and ML-KEM for key exchange, alongside classical ECDSA and AES-GCM. The stack adds Security Protocol and Data Model (SPDM)-based device attestation across servers and rack infrastructure, Device Identifier Composition Engine (DICE)-anchored cryptographic identity, and multi-device attestation for disaggregated rack environments. AMI Tektagon PQC Resiliency supplies an end-to-end framework for PQC-enabled provisioning, attestation, firmware updates, and lifecycle management on a pre-validated silicon and software stack.
“Customers no longer have to choose between security today and quantum readiness. Lattice Sentry delivers both, strengthening our leadership in secure, deterministic control for AI infrastructure,” said Mamta Gupta, VP, Business Development, Compute & Communications, at Lattice Semiconductor.
Lattice will demonstrate Sentry alongside its other PQC solutions at OCP Global Summit 2026.
Lattice Sentry 5.0 Turns Post-Quantum Silicon Into a Full Platform Security Stack
Analyst Take: Lattice Sentry 5.0 is the software half of the post-quantum position Lattice staked with silicon in September. The Mach-N2 launch gave Lattice the only small FPGA family with full CNSA 2.0 compliance. Sentry 5.0 wraps that silicon in a validated PFR and attestation stack with AMI Tektagon handling provisioning, updates, and lifecycle management. The sequencing prepares procurement teams to buy proven post-quantum systems now that CNSA 2.0 is in effect. New national security system acquisitions face a January 1, 2027 requirement for quantum-resistant signing, so a production-ready FPGA compliance path has emerged just in time. Futurum covered the Mach-N2 announcement as the moment post-quantum mandates convert security from a feature into a procurement gate. Sentry 5.0 is the follow-through and the first integrated product evidence that the $1.65 billion AMI acquisition changes Lattice’s roadmap along with its revenue outlook.
The AMI Acquisition Produces Its First Integrated Product in One Quarter
The strategic content of Sentry 5.0 is the AMI integration. Lattice closed the AMI acquisition this year and has already shipped a release in which Tektagon PQC Resiliency and the CNSA 2.0 FPGA portfolio form one pre-validated stack, with Radiant, Propel, and Tektagon design tools, a reference platform, and ready-to-run demos packaged as a single path from evaluation to production. Lattice and AMI had partnered on Sentry and Tektagon since 2022, which explains how a quarter of ownership could yield an integrated release.
The economics change as much as the engineering. As a partner, AMI monetized Tektagon separately. As a subsidiary, the firmware stack becomes attach rate leverage for Lattice control FPGAs, with the FPGA pulling through AMI’s software and manageability revenue, a base north of $200 million.
The integration challenge is channel exposure. AMI’s silicon-neutral position made Tektagon the default PFR software across server vendors regardless of whose root of trust sat on the board, and every release that couples Tektagon more tightly to Lattice silicon gives Microchip-based and Caliptra-based designs a reason to qualify alternatives. Lattice says Tektagon remains silicon-neutral. The proof will be whether future Tektagon releases ship PQC features on non-Lattice roots of trust at parity.
The First-Mover Claim Holds Against Controllers and Open Source for Now
The “industry’s first PQC-enabled PFR and attestation solution” claim deserves the scrutiny Futurum applies to all vendor firsts, and it survives a first pass with a definitional caveat. Microchip has introduced PQC-capable embedded controllers, including the MEC175xB family, and has expanded its post-quantum-ready root of trust controller line, but those are components. The system-level PFR stack with provisioning, attestation, and recovery remains the integrator’s problem. The Open Compute Project’s Caliptra silicon root of trust is adding PQC support in its 2.0 generation, with ML-DSA among the target algorithms, but Caliptra is an internal block that hyperscalers and silicon vendors embed in their own chips, not a board-level PFR product a server ODM can buy.
Lattice’s claim rests on shipping the complete, validated combination with CNSA 2.0 silicon, SP 800-193 resilience, SPDM and DICE attestation, and lifecycle software in one stack. That is a real distinction. Yet, the multi-device attestation capability may matter more over time than first-mover branding, because disaggregated racks multiply the devices that need cryptographic identity, and SPDM plus DICE across servers and rack infrastructure position the control FPGA as the attestation hub for OCP architectures.
OCP’s direction favors open, vendor-neutral roots of trust, and if Caliptra-based PFR implementations reach production maturity with PQC, the open alternative will compete on price at the hyperscalers that define rack-scale volume. Lattice’s counter is the long tail of enterprise, telecom, and government platforms that buy validated stacks rather than staff firmware security teams, necessitating a near-term CNSA 2.0 solution.
What to Watch:
- Whether OCP Global Summit demos pair Sentry 5.0 with Mach-N2 in rack-scale reference designs that name hyperscaler or ODM partners
- Whether Tektagon PQC features ship on non-Lattice roots of trust, testing the silicon-neutral commitment
- Whether Caliptra 2.0-based PFR implementations with PQC reach production at hyperscalers before the January 1, 2027 CNSA 2.0 procurement gate
- Whether Microchip responds with a system-level PQC PFR stack rather than component-level controllers
- Whether server RFPs begin specifying PQC-enabled attestation as a requirement beyond government programs
Read the complete press release on the company website.
Declaration of generative AI and AI-assisted technologies in the writing process: This content has been generated with the support of artificial intelligence technologies. Due to the fast pace of content creation and the continuous evolution of data and information, The Futurum Group and its analysts strive to ensure the accuracy and factual integrity of the information presented. However, the opinions and interpretations expressed in this content reflect those of the individual author/analyst. The Futurum Group makes no guarantees regarding the completeness, accuracy, or reliability of any information contained herein. Readers are encouraged to verify facts independently and consult relevant sources for further clarification.
Disclosure: Futurum is a research and advisory firm that engages or has engaged in research, analysis, and advisory services with many technology companies, including those mentioned in this article. The author does not hold any equity positions with any company mentioned in this article.
Analysis and opinions expressed herein are specific to the analyst individually and data and other information that might have been provided for validation, not those of Futurum as a whole.
Read the full Futurum Group Disclosure.
Other Insights From Futurum:
Lattice Mach-N2 Turns the Post-Quantum Procurement Gate Into an FPGA Moat
Lattice Semiconductor Q2 FY 2026: AMI Acquisition Pulls $1 Billion Revenue Rate Up to Q3 2026
Lattice Brings FPGAs and AMI Firmware to Arm’s $15 Billion AGI CPU Server Push
Author Information
Brendan is Research Director, Semiconductors, Supply Chain, and Emerging Tech. He advises clients on strategic initiatives and leads the Futurum Semiconductors Practice. He is an experienced tech industry analyst who has guided tech leaders in identifying market opportunities spanning edge processors, generative AI applications, and hyperscale data centers.
Before joining Futurum, Brendan consulted with global AI leaders and served as a Senior Analyst in Emerging Technology Research at PitchBook. At PitchBook, he developed market intelligence tools for AI, highlighted by one of the industry’s most comprehensive AI semiconductor market landscapes encompassing both public and private companies. He has advised Fortune 100 tech giants, growth-stage innovators, global investors, and leading market research firms. Before PitchBook, he led research teams in tech investment banking and market research.
Brendan is based in Seattle, Washington. He has a Bachelor of Arts Degree from Amherst College.
