Analyst(s): Futurum Research
Publication Date: June 1, 2026
Synopsys’ Q2 FY 2026 results point to sustained demand tied to advanced-node design, 3D-IC, and hyperscaler-led custom silicon programs. The quarter also advanced several monetization and integration efforts that could influence growth and margins into FY 2027.
What is Covered in This Article:
- Synopsys’ Q2 FY 2026 financial results
- Agentic AI model for EDA monetization
- IP shift toward hyperscaler engagements
- Synopsys-Ansys integration and portfolio plans
- Guidance and Final Thoughts
The News: Synopsys (Nasdaq: SNPS) reported Q2 FY 2026 revenue of $2.28 billion, up 42% year on year, and above Wall Street consensus of $2.25 billion. Design Automation revenue was $1.82 billion, up 62% year on year, while Design IP revenue was $454.2 million, down 5.8% year on year. Adjusted operating income was $899.7 million, up 48% year on year, and non-GAAP operating margin was 39.5%. Non-GAAP EPS was $3.35 for the quarter, versus $3.67 in Q2 FY 2025.
“Synopsys delivered a strong second quarter with solid execution and strength across the business,” said Sassine Ghazi, Synopsys president and CEO. “AI is scaling semiconductor demand, architectural diversity, and complexity of chips and the systems they power, driving demand across our portfolio.”
Synopsys Q2 FY 2026: AI-Driven Chip Design Demand Lifts Outlook
Analyst Take: Synopsys tied Q2 FY 2026 performance to sustained AI-related design activity and higher demand for advanced-node and 3D-IC flows. The company also emphasized a widening opportunity in simulation and analysis as AI systems push requirements beyond silicon into packaging, thermal, and system behavior. The near-term setup leans on execution and integration progress, while several growth and margin drivers shift into FY 2027 timing.
AI-Driven EDA Activity And Hardware-Assisted Verification
AI workloads continue to increase design starts and verification intensity, which favors EDA vendors with strength in advanced nodes, 3D-IC, and hardware-assisted verification. Synopsys pointed to demand from hyperscalers and leading semiconductor firms scaling emulation and prototyping, contributing to system wins across its verification platforms. The company also positioned 3D-IC compiler capabilities as more production-relevant as multi-die and chiplet architectures become common in AI accelerators. Early performance claims for Multiphysics Fusion included up to three times faster digital design closure with higher ECO success rates and up to two times faster turnaround for complex analog designs, with a commercial ramp planned in the second half of FY 2026. The core business implication is that AI-related complexity shifts EDA demand toward higher-value flows and more compute-intensive usage. This puts pressure on tool vendors to prove measurable productivity gains, not just feature breadth.
Agentic AI And A Potential Subscription-Plus-Consumption Model
Synopsys described a shift from AI features embedded in tools toward agentic workflows that combine human engineers and specialized AI agents. The company said 20 customers are evaluating solutions across more than 25 specialized AI agents spanning verification, implementation, and analog flows. That level of evaluation activity suggests early product-market testing is expanding beyond pilots into workflow design discussions. Synopsys framed the monetization path as a move from pure subscription licenses for human users to subscription plus consumption for agent usage of tools. If this model takes hold, the revenue driver becomes not only seats, but also compute-driven tool usage tied to training and inference cycles. The strategic risk is customer pushback if value capture rises faster than provable productivity, especially in cost-sensitive design teams. The contract structure shift matters because it can change both revenue mix and renewals over time.
IP Mix Shift Toward Hyperscaler Custom Silicon And New Business Models
Synopsys acknowledged muted IP growth expectations for FY 2026 but argued the IP segment bottomed in Q1 FY 2026 and began recovering, supported by sequential improvement in Q2. The company emphasized higher-value IP engagements aligned with hyperscaler custom silicon, where collaboration depth and customization can expand deal size beyond traditional license fees and limited non-recurring engineering structures. Synopsys cited a greater than 90% win rate for PCIe 7.0 IP with 18 new licenses in Q2, plus momentum in 224G connectivity and UCIe wins, including a 64G tapeout on a 2-nanometer process and over 150 lifetime UCIe wins. It also announced the industry’s first HBM4 IP test chip, reinforcing alignment to AI infrastructure memory and interconnect requirements. The company described progress toward new IP business models that could capture more dollars per customer, particularly as hyperscalers treat IP availability as a dependency for their chip roadmaps. This is a directional change that can raise both revenue durability and pricing power if customers accept a different value-sharing framework.
Guidance And Final Thoughts
Synopsys raised FY 2026 revenue guidance to $9.625 billion to $9.705 billion, with the midpoint increase driven by $35 million from business performance and a $60 million EPS-neutral Ansys channel accounting impact, partly offset by a $40 million reduction tied to the expected close of the Processor IP Solutions divestiture. The company guided Q3 FY 2026 revenue to $2.41 billion to $2.46 billion and non-GAAP EPS to $3.63 to $3.69. Full-year non-GAAP EPS guidance increased to $14.72 to $14.80, alongside a midpoint non-GAAP operating margin target of 41%. Management also pointed to integration, execution, and cost discipline as drivers of operating margin expansion, with a stated goal to achieve about half of the committed Ansys cost synergies by the end of FY 2026. Investor Day is scheduled for September 30, 2026, with an expectation of additional long-term targets and strategy details.
Synopsys appears increasingly positioned around the parts of semiconductor development that become more valuable as AI architectures grow more complex, particularly across verification, packaging, simulation, and hardware-assisted design flows. The company’s push toward agentic EDA workflows and broader consumption-based monetization also signals an attempt to capture more value from rising compute intensity inside chip development itself. However, the transition toward new pricing models, deeper hyperscaler customization, and large-scale integration efforts such as Ansys also increases execution sensitivity, especially if customers begin demanding clearer productivity gains relative to rising design and tooling costs.
See the full press release on Synopsys’s Q2 FY 2026 financial results on the company website.
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Analysis and opinions expressed herein are specific to the analyst individually and data and other information that might have been provided for validation, not those of Futurum as a whole.
Other Insights From Futurum:
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Synopsys Extends Simulation Reach to the Lunar Surface via Artemis Program
Synopsys Converge 2026 Unveils Multi-Physics Design
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