Analyst(s): Brendan Burke
Publication Date: March 13, 2026
Synopsys Converge 2026 unveiled the “New Synopsys” post-Ansys-acquisition vision, introducing a silicon-to-systems design paradigm enabled by AI and a shift-left approach to multi-physics chip design. The event featured the launch of Multiphysics-Fusion technology for integrated EDA solutions and the AgentEngineer multi-agent L4 design workflow, while also addressing hardware engineer skepticism about the path to full agent autonomy in chip design.
What is Covered in This Article:
- Synopsys launches Multiphysics-Fusion technology — the first integrated Synopsys-Ansys EDA solutions for semiconductor design, addressing thermal, electromagnetic, and voltage drop challenges
- AgentEngineer technology demonstrates the industry’s first orchestrated, multi-agent L4 design and verification workflow, with customers reporting 2x–5x productivity gains
- Ansys 2026 R1 marks the first major Ansys product release since the acquisition, with new agentic AI simulation capabilities and joint Synopsys-Ansys workflows
- New hardware-assisted verification (HAV) platforms with software-defined capabilities deliver 2x performance and capacity scaling for AI-era superchip designs
- Hardware engineers remain skeptical that chip design agents can achieve full autonomy, citing interpersonal design dynamics and the single-threaded nature of chip design
The Event — Major Themes & Announcements: Synopsys opened Synopsys Converge 2026 — its new flagship conference — with a keynote by President and CEO Sassine Ghazi, who outlined a vision for a new silicon-to-systems design paradigm: one that is silicon-powered, AI-enabled, and software-defined. The event marks the public debut of what Synopsys is calling the “New Synopsys” — the combined entity formed after four decades of pure-play EDA leadership and the transformational acquisition of Ansys, bringing nearly a century of combined engineering expertise to bear on semiconductor and systems design.
“The complexity of next-generation intelligent systems requires a completely new engineering approach,” Ghazi said. “By integrating co-design of software and hardware, electronics and physics, by harnessing digital twins to design, test, and refine products before physical production, and using AI to enhance human capabilities, customers’ R&D teams can accelerate time to market of their intelligent systems.”
The event featured five major product announcements. First, Multiphysics-Fusion™ technology integrates Ansys’s golden multiphysics engines into Synopsys’s EDA portfolio to address voltage drop, thermal effects, and electromagnetic coupling challenges in heterogeneous designs at advanced nodes. Second, AgentEngineer technology powers the industry’s first orchestrated, multi-agent L4 agentic workflow for design and verification. Third, Ansys 2026 R1 — the first major Ansys release since the acquisition closed — delivers new agentic AI simulation capabilities and joint Synopsys-Ansys workflows. Fourth, new HAV platforms, including HAPS-200 and ZeBu-200 with software-defined capabilities, set new performance and scalability benchmarks. Fifth, Synopsys also announced the Electronics Digital Twins (eDT) Platform at Embedded World, targeting automotive OEMs to achieve up to 90% of software validation prior to hardware availability.
Synopsys Converge – Is the New Synopsys Ready to Own Multi-Physics Design?
Analyst Take — Synopsys Converge Multi-Physics Chip Design Marks a Paradigm Shift: Synopsys Converge 2026 represents the most consequential EDA industry event since the ChatGPT moment. The company is fundamentally redefining what it means to be an EDA vendor. By integrating Ansys’s multiphysics simulation engines directly into the chip design flow, Synopsys is betting that the future of semiconductor design cannot be solved with electrical analysis alone. Voltage drop, thermal effects, and electromagnetic coupling at advanced nodes have become first-order design challenges, and multi-physics chip design solutions address these issues through co-design rather than overdesign. The first Multiphysics-Fusion capabilities — spanning timing signoff, multi-die design, design closure, and analog/mixed-signal — are now in active beta with early access customers, with production availability expected in the coming months. This is a shift-left approach to multi-physics design integration: rather than discovering thermal or electromagnetic issues at signoff and iterating backward, teams can identify and resolve them earlier with greater accuracy and better correlation to final signoff.
The 3D Chip Design Gap
3D design turns chip development into a tightly coupled multi‑die, multi‑physics problem. Physics issues, including thermal, mechanical effects, stress, IR‑drop, signal integrity, and even optics, must be considered upfront in architecture and partitioning instead of as late 2D‑style sign‑off checks. A panel including representatives from AMD, Broadcom, Synopsys, and TSMC shared that this breaks chip design’s traditional waterfall handoff model and exposes gaps in tooling, data exchange, and standards. making it hard for architecture, silicon, packaging, board, and system teams to co‑design effectively. Ravi Subramanian, Chief Product Management Officer, cautioned that “the world is moving under our feet” with customer divergence away from industry standards into custom chiplet architecture and interface IP. Because Synopsys is building a unified 3D-IC platform (3DIC Compiler), integrating sign‑off physics engines upstream, and adding agentic automation for exploration and optimization, its software can add disproportionate value to chiplet design.
AgentEngineer reaches 2x–5x Gains, But Full Autonomy Remains Elusive
The AgentEngineer announcement is equally significant. The orchestrated, multi-agent L4 workflow demonstrated at Converge generates RTL from natural language, runs Lint checks, generates unit-level testbenches, and iteratively runs verification with EDA tools — a front-end process that, using traditional methods, typically takes a team of verification engineers four to six months for a large SoC. The solution leverages Microsoft’s Discovery platform and Nvidia agent tooling for multi-agent orchestration. Synopsys reports customers are already seeing 2x productivity improvements, with gains as high as 5x in select cases. The company is collaborating with AMD and other industry leaders to develop differentiated agentic capabilities with increasing levels of autonomy over time.
Adoption of the well-established Synopsys.ai Copilot feature — the assistive tier that feeds the agentic roadmap — is substantial: 40+ customers, 20,000+ active users, and 5M+ queries processed, with 50–70% time-to-solution improvements. On the generative side, Synopsys reports lint-checking 5M+ lines of code and generating 200,000+ formal assertions, with 25–50% productivity gains in RTL generation, RTL Linting, and formal closure tasks.
However, hardware engineers we spoke with at Converge remain skeptical that chip design agents can gain full autonomy. They cite the interpersonal dynamics required to set design goals and the fundamentally single-threaded nature of chip design processes, which makes groups of parallel agents less useful than in software engineering workflows. The foundry panel further highlighted the complex handshakes in the chip design process that are difficult to entrust to agents. Additional evidence is also needed from multi-physics modeling to demonstrate added benefits over existing thermal and mechanical engineering approaches. This skepticism is worth watching as it suggests the path to full autonomy in chip design may be significantly longer than Synopsys’s pathfinding status currently implies.
Physical AI and Robotics: From Silicon to Systems
The most expansive element of the “New Synopsys” vision is the extension into physical AI systems, particularly robotics simulation and factory digital twins. The Executive Forum physical AI panel made clear that the same simulation methodology that has kept NVIDIA’s chip tapeouts on track for 25 years is now being applied to robots, autonomous vehicles, and intelligent manufacturing systems. The implications are significant. Synopsys now serves the semiconductor companies designing AI accelerator chips and — through Ansys’s 18,000 customer base — the manufacturers, automakers, and robotics companies that deploy those chips in physical systems. The eDT Platform creates a closed loop: design the chip, verify the software on a virtual prototype, simulate the physical system the chip will operate in, and validate safety before any hardware exists. Volvo Cars is already using Synopsys’s electronics digital twins to “shift left” vehicle validation, and Scheffler described investing heavily in GPU-accelerated simulation to design complete factory sections and run robots through high-fidelity scenarios before spending a dollar on hardware.
The panel’s most provocative insight came from the robotics safety discussion. Today’s industrial robots are caged precisely because they are “blind and dumb” — they execute repetitive motions without perception. The unlock for uncaging robots is intelligence itself: the ability to perceive, reason, and adapt. But this creates a new engineering challenge. Robotics safety standards are surprisingly more stringent and more rigorous than automotive functional safety. Safety must extend from the robot’s “brain” down to the tiny actuators controlling finger joints, with every device authenticated and secured end-to-end. This is a systems-level co-design problem that spans silicon, software, perception, and physical interaction — exactly the kind of multi-domain challenge the combined Synopsys-Ansys portfolio is positioned to address. The data flywheel for physical AI mirrors what Synopsys has built for chip design. Simulation trains the robot’s brain; deployment in the real world reveals gaps (like the shininess of factory floors disrupting lidar — something Scheffler discovered only after physical deployment); that data feeds back into simulation to expand the operational domain. With tools like NVIDIA Omniverse and Synopsys/Ansys simulation, this feedback loop is accelerating dramatically.
NVIDIA Collaboration Underscores HAV’s Strategic Value
Synopsys views its strategic partnership with Nvidia as a foundation for AI factory optimization. The new hardware-assisted verification portfolio, with software-defined capabilities delivering up to 2x higher performance on ZeBu Server 5 and up to 2x capacity scaling for modular HAV systems, is particularly relevant in the context of AI chip complexity. The ZeBu and HAPS systems enable emulation and prototyping for NVIDIA SoCs, scaling with increasing processor complexity and interconnect speeds while allowing granular pre-silicon debugging to keep tapeout processes efficient and launch cycles on time. Synopsys’s HAV investments are well-timed to address the pressure of rapid verification for next-generation AI chips. Jensen Huang’s keynote highlighted that co-design now includes AI infrastructure, and Synopsys is well-positioned to expand with NVIDIA from chip design to AI factory design.
The Competitive Context
The competitive backdrop intensifies the stakes. Cadence recently acquired ChipStack, a front-end AI startup, and made a significant public splash. Synopsys positioned its ground-up, tool-native agentic approach as fundamentally superior with the observability and controllability hooks available when agents are built from inside EDA tools themselves. The Ansys integration gives Synopsys another dimension of competitive differentiation that Cadence currently lacks with a native multiphysics simulation stack that extends the design conversation from electrical to thermal to mechanical in a single integrated flow.
What to Watch:
- Customer validation of Multiphysics-Fusion in production. The shift from beta to production availability will be the key proof point. Watch for design teams reporting measurable reductions in design iterations and improved PPA metrics from co-design versus traditional overdesign approaches — particularly at 3nm and below, where thermal and electromagnetic effects are most acute.
- AgentEngineer adoption beyond early movers. Synopsys is collaborating with AMD and others, but the real test is whether the broader chip design community — especially analog and mixed-signal teams — embraces agentic workflows. The skepticism from experienced hardware engineers about agent autonomy suggests adoption will be uneven across design disciplines.
- Cadence’s response to the multi-physics moat. Cadence’s ChipStack acquisition gives it front-end AI capabilities, but it lacks an Ansys-equivalent multiphysics simulation stack. Watch for Cadence to either acquire or partner for physics simulation capabilities to match Synopsys’s integrated story.
- The eDT Platform’s automotive traction. The claim of up to 90% software validation prior to hardware availability is bold. Automotive OEMs will be the proving ground for Synopsys’s silicon-to-systems ambitions beyond traditional chip design customers.
- NVIDIA HAV scaling as a leading indicator. The ZeBu and HAPS platforms’ ability to scale with next-generation NVIDIA SoC complexity will serve as a barometer for whether Synopsys’s verification portfolio can keep pace with AI chip design demands. If verification becomes the bottleneck, it could constrain the broader AI compute buildout.
Read the full press release “Synopsys Outlines Vision for Engineering the Future” on Synopsys’s website.
Disclosure: Futurum is a research and advisory firm that engages or has engaged in research, analysis, and advisory services with many technology companies, including those mentioned in this article. The author does not hold any equity positions with any company mentioned in this article.
Analysis and opinions expressed herein are specific to the analyst individually and data and other information that might have been provided for validation, not those of Futurum as a whole.
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Author Information
Brendan is Research Director, Semiconductors, Supply Chain, and Emerging Tech. He advises clients on strategic initiatives and leads the Futurum Semiconductors Practice. He is an experienced tech industry analyst who has guided tech leaders in identifying market opportunities spanning edge processors, generative AI applications, and hyperscale data centers.
Before joining Futurum, Brendan consulted with global AI leaders and served as a Senior Analyst in Emerging Technology Research at PitchBook. At PitchBook, he developed market intelligence tools for AI, highlighted by one of the industry’s most comprehensive AI semiconductor market landscapes encompassing both public and private companies. He has advised Fortune 100 tech giants, growth-stage innovators, global investors, and leading market research firms. Before PitchBook, he led research teams in tech investment banking and market research.
Brendan is based in Seattle, Washington. He has a Bachelor of Arts Degree from Amherst College.
